The tried and true transistor outline “TO” package

The tried and true transistor outline “TO” package

The Transistor Outline or “TO” package was developed by the semiconductor and microelectronics industry in the 1950s. In addition to addressing requirements for very low thermal resistance, the goal was to create highly reliable (often hermetic) packages in common outlines to keep costs down while standardizing a suite of solutions in accordance with JEDEC . (While there are plastic versions of TO packages, this article pertains to metal TO packages.)

The basic TO or “metal can” package consists of a metal base with leads exiting through a glass seal. This glass seal can be a compression seal or a matched seal. After device assembly in the package, a metal lid is resistance welded to the metal base forming the hermetic seal. These packages usually contain less than 24 leads.

One of the most popular TO packages, the TO-3, was originally designed by Motorola c. 1955. It features lead spacing that was designed to allow plugging the device into a common socket used by Motorola at that time. But it largely remains the same today. It provides low thermal resistance for hermetically packaged voltage regulators, power transistors, rectifiers, and other integrated circuits. Another popular package is the TO-8 shown above. This style is popular in the RF/microwave industry for housing oscillators, and in the optical industry for housing sensors.

TO packages and headers are in use today in all facets of microelectronic applications on both the transmit and receive side of a transceiver system. They’re also proven in high-speed data transfer, infrared, and other opto-electronic applications. 

Micro-Electro-Mechanical Systems (MEMS) packaging represent a new area of microelectronic packaging applications for the TO package. MEMs systems enable optical signals to be switched using a range of small, mobile mirrors and are becoming increasingly accepted in high volume applications such as LCD projectors.

Electronic Products Inc. (EPI) specializes in the design and manufacture of both legacy and custom engineered transistor outline (TO) packages and headers used in a variety of high-performance applications such as: RF, Microwave, wireless, optoelectronics, photonics, and power semiconductor applications. In addition to traditional “TO-cans”, optional styles include stamped, coined, cold-headed, drawn, machined, multi-pin headers, and more.

Given increasing pressure for lower costs, device miniaturization, and higher performance, there are very few packaging styles that have withstood the test of time like the TO package. It’s testimony to the commitment the original JEDEC designers put into providing flexibility of design in a robust package that is readily hermetically sealed.

Learn more and request pricing on our TO Packages and Headers page >>